Design of a high voltage gain converter using coupled inductor with reduced voltage stress for photovoltaic energy based systems

This paper presents the design and analysis of a high voltage gain converter utilizing a coupled inductor with reduced voltage stress, specifically for photovoltaic energy-based systems. The proposed converter employs a two-winding coupled inductor and voltage multiplier cells to achieve an increase in output voltage while mitigating voltage stress across semiconductor components. Additionally, the voltage multiplier cells function as voltage clamps for the power switch, further enhancing the converter's performance. The converter features a single switch design, which simplifies control, reduces cost, and improves reliability. Key advantages of the converter include a low component count, a common ground between input and output ports, and high efficiency. The converter's performance is thoroughly investigated through mode analysis and steady-state analysis. Comparative evaluations with similar converters are conducted to highlight the benefits and performance of the proposed design. To validate the theoretical analysis, a 125 W prototype with 26 V input and 200 V output voltages operating at a 50 kHz switching frequency is developed, and experimental results are presented, demonstrating the effectiveness and practicality of the proposed high voltage gain converter.

The global shift towards clean and sustainable energy sources has catalyzed the advancement of renewable energy technologies 1,2 .Among these, photovoltaic (PV) systems stand out due to their ability to directly convert sunlight into electricity using semiconductor materials 3,4 .As a prominent and eco-friendly alternative to fossil fuels, PV systems are integral to reducing greenhouse gas emissions and achieving energy independence 5,6 .However, the efficiency and effectiveness of PV systems in practical applications hinge on advanced power conversion technologies that can manage the inherent characteristics of solar energy, such as variable output voltage and relatively low voltage levels 7,8 .
Figure 1 shows the power electronics-based power system with integration of the renewable energy resources.A key technology in this domain is the high step-up DC-DC converter, which is essential for integrating PV systems into the electrical grid or standalone power systems.These converters are designed to boost the low voltage produced by PV panels to higher levels suitable for various applications, ensuring efficient power transfer, system stability, and compatibility with downstream components.PV panels typically generate a DC voltage that ranges between 18 and 45 V for individual modules 9 .For effective use in grid-tied inverters, battery charging systems, or direct load applications, this voltage needs to be increased significantly, to 200 V or higher.High step-up DC-DC converters are specifically designed to perform this voltage transformation efficiently, enabling the integration of PV systems with standard electrical infrastructure.Maximizing energy conversion efficiency is crucial for PV systems to make the most of the harvested solar energy 10,11 .High step-up DC-DC converters are engineered to minimize energy losses during the conversion process.Advanced designs and control techniques ensure that the converters operate at high efficiency across a wide range of operating conditions, thereby enhancing the

Operation modes analysis
The proposed DC-DC converter topology is shown in Fig. 2.This converter is designed to efficiently convert energy using a combination of inductors, capacitors, diodes, and switches.The primary components include: One power switch (S), four diodes One coupled inductor with a turns ratio defined as N = N 2 /N 1 .
This configuration enables the converter to operate through different modes within each switching period, optimizing energy transfer and ensuring high efficiency.The main waveforms are depicted in Fig. 3, and equivalent circuit of each mode is visible in Fig. 4 (a)-(c).
Mode 1 (t 0 < t < t 1 ): In this initial mode, the power switch S is turned on, allowing the inductor Lin to store energy from the input voltage source V in .During this phase, diodes D 1 , D 2 , and D 3 are reverse-biased, while diode D o is forward-biased, allowing current to flow through it.The current through the L in increases linearly due to the constant voltage applied across it.Capacitors C 1 , C 2 , and C 3 help in smoothing the voltage and reducing ripple by storing and releasing energy as needed.This mode is crucial for building up the energy in the inductor which will be transferred to the output port.Therefore, the energy stored in the magnetic field of the inductor is fully transferred to the load and output capacitors.
(1) becomes reverse-biased, and D 1 becomes forward-biased, allowing current to flow through D 1 .This mode is characterized by the transfer of energy from the inductor L in to the VMCs capacitors.The current through the inductor L in decreases as energy is delivered to the load by output capacitors C o , while the voltage across the inductor reverses, driving the current through D 1 .
Mode 3 (t 2 < t < t 3 ): In Mode 3, the power switch S remains off, and diode D 1 continues to conduct.This mode ensures the continuous delivery of energy to the load even when the power switch is off, providing a path for the inductor current to flow.The inductor L in might have a residual current flowing through it, which gradually decreases.Diode D 2 is in a blocking state, ensuring no reverse current flows back to the source, thus maintaining efficient operation.This mode helps to prevent oscillations and ensures smooth current transition before the cycle restarts with Mode 1.
In the proposed DC-DC converter, the leakage energy of the coupled inductor is effectively managed and recycled to enhance the overall efficiency.During Mode 1, energy is stored in the leakage inductance.In Mode 2, this leakage energy is transferred to capacitor C 3 via diode D 2 , thereby reducing energy losses associated with leakage inductance.In Mode 3, any remaining leakage energy is fully transferred to the output, ensuring that operation under normal load conditions, which helps in reducing ripple and improving the overall efficiency of the converter.The coupled inductor with its turns ratio N helps in adjusting the voltage levels and improving the power transfer capability of the converter.The proposed DC-DC converter efficiently manages energy transfer through these three operations modes.By appropriately switching the power switch and diodes, the converter ensures minimal energy loss and optimal performance.

Anaylsis of steady-state operation
The proposed DC-DC converter's steady-state operation is characterized by the voltages across its components during each switching period.The key voltage relationships are derived based on the applied volt-second balance principle on the inductors and capacitors.

Voltages
Applying volt-second balance principle over inductor L in and magnetizing inductance of the coupled inductor (L m ), the voltage of C 1 and C 2 are calculated versus input voltage: www.nature.com/scientificreports/Using (10) and ( 13), the voltage over C 3 and C 4 can be determined: By replacing ( 16), ( 17), (18), and ( 19) into (3), the output voltage, and therefore the voltage gain are calculated as ( 2) and (21).
Considering the obtained equations for capacitors and output port, the voltage stress across semiconductors can be obtained.The calculated equations for power switch and diodes voltage stresses are summarized at Table 1. Figure 5 (a) and (b) depict the voltage gain and normalized voltage stresses versus duty cycle and turns ratio of the coupled inductor.

Currents
Based on the configuration of the proposed topology, the average current of diodes D 1 , D 3 , and D o are equal to the output current Io.Also, the input average current can be determined using voltage gain relation Using KCL law, the average current of the power switch is calculated versus input and diode D 1 average currents.The average current of L m is also achieved versus input and power switch average currents.
As power switch S is turned on in mode 1, the peak current of this element can be obtained using average current as Eq. ( 25).

Inductors
The inductors play a critical role in energy storage and transfer: Inductance Value for Lin: Should ensure Continuous Conduction Mode (CCM) operation under normal load conditions, reducing ripple and improving efficiency.
Coupled Inductor: The turns ratio N helps in adjusting voltage levels and improving power transfer capability.It should be designed to ensure efficient energy transfer.The minimum values of input inductor L in and magnetizing inductance (L m ) of the coupled inductors are obtained using (38) and (39).
In each operation mode, the leakage energy of the coupled inductor is managed as follows: Mode 1: Energy is stored in the leakage inductance.Mode 2: Leakage energy is transferred to capacitor C 3 via diode D 2 , reducing energy losses.Mode 3: Remaining leakage energy is transferred to the output, ensuring efficient energy utilization.By appropriately switching the power components and selecting optimal values for the inductors and capacitors, the proposed DC-DC converter achieves high efficiency and reliable performance across all operation modes.

Capacitors should have low Equivalent Series Resistance (ESR) to handle ripple currents efficiently:
Voltage Rating: Should be higher than the voltage across the capacitor.In this paper, assumption (40) is taken into account.
Current Rating: Should handle the ripple current without excessive heating.The equations for calculating the minimum values of capacitors C 1 -C o are summarized in (41-45). (37

Experimental and comparison results
This section describes the laboratory prototype's experimental results.To show the mathematical analysis, a 125 W system is designed with a switching frequency of 50 kHz and voltage conversion from 26 to 200 V. Table 2 shows the experimental characteristics and cost for each component.The experimental prototype is seen in Fig. 6.The experimental waveforms are shown in Fig. 7a-h.Based on these waveforms, the output voltage and current are 200 V and 0.625 A, respectively.As a result, the experimental voltage gain is 7.69, calculated as 200 V divided by 26 V.For D = 0.6 and N = 1, the theoretical voltage gain is 8.It is obvious that for V in = 26 V, the theoretical output voltage is 208 V. Figure 7b depicts the voltage waveforms of power switch S and diode D 2 , where the maximum blocking voltage across power switch S and V D2 is measured 62 V. Figure 7c shows the voltage across diode D 1 and capacitor C 1 , which are 124 V and 35 V, respectively.Figure 7d   www.nature.com/scientificreports/3.3 V, suitable for the used microcontroller's analog-to-digital converter (ADC).The voltage divider circuit is designed such that the maximum output voltage of 200 V is reduced to 3.3 V.This ensures that the input to the ADC remains within its operational range.

Analog-to-Digital Conversion:
The STM32F103C8T6 microcontroller features 12-bit ADC units, which are configured to sample the conditioned voltage signal.Thus, the ADC converts the analog voltage ranging from 0 to 3.3 V) into a digital value between 0 and 4095 (2 12 -1 = 4095).This digital value represents the scaled version of the converter's output voltage.

Proportional-Integral (PI) Controller:
The digital value from the ADC is fed into a PI controller algorithm implemented as a function inside of the main codes.The PI controller calculates the error between the desired setpoint voltage and the measured output voltage.It then computes the necessary correction to minimize this error over time.The output of the PI function is used to adjust the duty cycle of a Pulse Width Modulation (PWM) signal.

PWM Generation:
The computed duty cycle from the PI function is set to the capture compare register (CCR) of a timer unit within the microcontroller.One of the timer channels is configured to generate a PWM signal based on the duty cycle value.The clock frequency of the timer unit is set equal to 64 MHz The PWM frequency (50 kHz) is obtained using the following equation: = 50 kHz

Conclusion
This paper has addressed the challenge of achieving high voltage gain with reduced voltage stress on semiconductor components in photovoltaic energy-based systems by presenting a novel converter design.The proposed converter utilizes a two-winding coupled inductor and voltage multiplier cells to boost the output voltage and serve as voltage clamps for the power switch, thereby enhancing performance.The single switch design simplifies control, reduces costs, and improves reliability.The converter boasts key advantages such as a low component count, a common ground between input and output ports, and high efficiency.A thorough investigation of the converter's function was conducted through mode analysis and steady-state analysis.A 125 W prototype operating at a 50 kHz switching frequency was built to validate the theoretical analysis.In the experimental results, a closed-loop system was presented for the proposed converter, further demonstrating its effectiveness.The experimental results confirmed the practicality of the high voltage gain converter, with a maximum efficiency of 94.21% at the rated power of 125 W.

Fig. 5 .
Fig. 5. (a) voltage conversion versus D and N, (b) comparison of the normalized voltage stress.

Mode 2 (t 1 < < t < t 2 ): At
the beginning of Mode 2, the power switch S is turned off.The energy stored in L in is now released.Diode D o The presented DC-DC Converter.Vol:.(1234567890)

Table 2 .
displays the voltages of capacitors C 2 and C 3 , which are 62 V and 73 V, respectively.The voltage over diodes D 3 and D o is measured equal to 61 V and 62 V, respectively, while the measured voltage across capacitor C 4 is 35 V.The maximum voltage stress over power switch S is equal to 62 V/200 V = 0.31.Furthermore, the maximum voltage stress of diodes is proportional to diode D 1 : 124 V/200 V = 0.62.The calculated voltage stress presented in Table1can be validated through these experimental results.Figures7g, hillustrate the voltage and current waveforms of the Experimental characteristics.

Table 3 .
Total loss in each power point., f pwm is the PWM frequency, f clock is the clock frequency, PSC is the prescaler value, and ARR is the auto reload register (counter period) value.Figure10shows how PWM pulse is generated in the timer unit with center-aligned mode counting.This PWM signal controls the power switch of the converter, thereby regulating the output voltage.By integrating these components: voltage divider, ADC, PI controller function, and PWM generation, the system achieves stable control over the converter's output voltage.The experimental closed-loop dynamic response of the output voltage and current waveforms are shown in Fig.11.Initially, the output voltage and current are set to 200 V and 0.625 A, respectively.When the output load suddenly increases from 125 W to 235 W, the output current rises from 0.625 A to 1.2 A. Despite this change, the output voltage is successfully regulated with only a 2% variation, and the transient response time is 250 ms.Finally, the proposed converter is compared with other similar converters in terms of component count, voltage gain, and voltage stress on semiconductors, as summarized in Table4.Based on the theoretical and experimental results, it can be concluded that the proposed converter is a suitable choice for renewable energy systems, particularly photovoltaic energy systems, that require a high voltage DC bus with regulated voltage.Its high voltage gain, reduced voltage stress on semiconductor components, and efficient performance make it highly suitable for applications where stable Vol:.(1234567890)where
www.nature.com/scientificreports/and reliable voltage regulation is critical.The proposed converter's design enhances performance while simultaneously simplifying control and lowering costs, making it a vital part in the current renewable energy systems.